This invention relates to methods of forming capacitors.
As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. One principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors.
One type of capacitor structure forms at least one of the capacitor electrodes into a container-like shape. A suitable opening is formed within a container forming material, typically a dielectric layer although bulk and other substrate materials can be used. A conductive layer is formed within the openings to partially fill them to form upwardly open vessel-like structures. The conductive material is then patterned or planarized back, typically to form isolated capacitor electrodes for the capacitors being formed. Some or all of the container forming layer might then be etched from the substrate to expose outer sidewalls of the container-shaped electrodes. One or more suitable capacitor dielectric layers would then be formed over the container-shaped electrode. Another conductive layer is then formed over the capacitor dielectric layer(s) and patterned or otherwise processed to complete the capacitor construction.
As minimum feature dimensions get smaller and smaller, the thickness or vertical length/height of devices tends to increase, and does so particularly with capacitors in order to maintain adequate surface area and accordingly desired capacitance.
The invention includes methods of forming capacitors. In one implementation, a method of forming a capacitor includes depositing a container forming layer over a substrate. A carbon containing masking layer is deposited over the container forming layer. The carbon containing masking layer is patterned to comprise a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings respectively have at least three peripheral corner areas which are each rounded. The container forming layer is plasma etched through the masking layer openings. In one implementation, such plasma etching uses conditions effective to both a) etch the masking layer to modify shape of the masking layer openings by at least reducing degree of roundness of the at least three corners in the masking layer, and b) form container openings in the container forming layer of the modified shapes. In one implementation, the respective container openings in the masking layer include a plurality of straight line segments at least 2 nanometers long. The container forming layer is plasma etched through the masking layer openings using conditions effective to both a) etch the masking layer to modify shape of the masking layer openings to increase the number of straight line segments at least 2 nanometers long, and b) form container openings in the container forming layer of the modified shapes. In one implementation, the carbon containing masking layer is patterned to comprise a plurality of circular shaped container openings therein having minimum diameter of less than or equal to 0.20 micron. The container forming layer is plasma etched through the masking layer openings using conditions effective to both a) etch the masking layer to modify shape of the masking layer openings from circular to having at least four straight line segments of at least 2 nanometers long, and b) form container openings in the container forming layer of the modified shapes. Capacitors comprising the container shapes are formed using the container openings in the container forming layer.
Other aspects and implementations are contemplated.